Experience
A chronological rundown of the roles I've held so far. For the full breakdown with details, check out my resume.
Electrical Engineer Intern — Cell Antenna Corporation
Engineered a full-stack direction-finding system using FastAPI and Rust for the backend and a JavaScript web interface to visualize real-time signal data from an antenna array. Developed a GUI (Python/DearPyGui) and a Rust-based asynchronous API (Actix-Web) to control a Yocto Linux-based SDR and GPS device, and wrote time-critical Assembly firmware for an Atmel microcontroller synchronized to a GPS PPS signal.
GPU Firmware Engineer Intern, Infrastructure Team — NVIDIA
Built a wizard and series of scripts (Python, Batch, Bash, PowerShell, Docker) to create custom containerized environments for building firmware packages and microcode components, reducing ramp-up time for new engineers. Optimized the boot instantiation sequence in C for a next-generation GPU architecture and resolved MASM build issues in assembly-level tooling.
Undergraduate Researcher — SmartSystems Lab, University of Florida
Designing an FPGA-based CNN accelerator for AI inference, including a custom frontend architecture for convolution dataflow, line-buffered sliding-window generation, and memory structures for feature-map reuse. Integrating accelerator datapaths with systolic-array-oriented modules, AXI4/AXI4-Stream communication, and clock-domain-crossing logic for SoC-style deployment.
GPU Firmware Engineer Intern, Infrastructure Team — NVIDIA
Developed a remote testing pipeline to validate firmware on target hardware, automating GPU ROM data extraction and Pytest execution. Created an automated regression hunting tool that performs a binary search across Perforce changelists to pinpoint commits responsible for build failures or performance regressions, and enhanced a containerized development environment for firmware builds.
Undergraduate Teaching Assistant — University of Florida
Assist in instruction of digital logic and hardware design concepts, including FSMs, datapath/control separation, pipelining, and timing analysis using SystemVerilog. Lead lab support sessions, debug student designs through RTL simulation, synthesis, and FPGA deployment, and grade assignments focused on RTL design and hardware verification.
GPU Firmware Engineer Intern, Chips Team — NVIDIA
Rearchitected the settings (register-configuration) model for GPU hardware-initialization boot microcode across NVIDIA's next-generation Rubin-architecture client GPUs, consolidating 40+ per-module C header files into a single schema-generated header. Redesigned the microcode's build and linking process so configuration data packages directly into the microcode's own data memory, and built a build-time "burn" capability that produces fully self-contained, chip-specific boot images.
Want more detail on any of these, or want to see the projects behind them? Head over to Project Details or reach out via email.